Optimized Asynchronous Circuit Design based on Evolutionary Algorithm

Remarkable advantages of asynchronous circuits in comparison with their synchronous counterparts results in vast effort in designing such circuits. This paper proposes optimized asynchronous circuit design approach by exploiting potent evolutionary circuit design method. The evolutionary algorithm applies fast and accurate hazard detection technique as a fitness function. Outcomes of proposed method in designing fundamental mode asynchronous circuit in comparison with previous methodologies reveal its notable advantages like, multi level circuit design with lower number of gates which results in lower area, lower power consumption and lower cost. Experimental result demonstrate that the proposed method reduces number of gates about 16.81%.